small refactor for readability

Interpreter.cpp

@@ -15,6 +15,7 @@ Interpreter::Interpreter(unsigned ticksPerSecond, Display &display, Buzzer &buzz
   mvReg{} {}
 
 void Interpreter::tick() {
+  // decodes all possible machine code arithmetic opcodes
   constexpr Opcode opcodeMap[16] = {
     Opcode::SET, Opcode::OR,  Opcode::AND, Opcode::XOR,
     Opcode::ADD, Opcode::SUB, Opcode::RSH, Opcode::SUB2,
@@ -22,66 +23,70 @@ void Interpreter::tick() {
     Opcode::UNIMPL, Opcode::UNIMPL, Opcode::LSH, Opcode::UNIMPL,
   };
 
-  unsigned pc = mvSpecialReg[SR_PC];
+  // fetch instruction
+  sreg_t pc = mvSpecialReg[SR_PC];
   unsigned inst = (mvMemory[pc] << 8) | mvMemory[pc + 1];
-  unsigned reg1 = (inst & 0x0F00) >> 8;
-  unsigned reg2 = (inst & 0x00F0) >> 4;
-  unsigned imm1 = (inst & 0x000F);
-  unsigned imm2 = (inst & 0x00FF);
-  unsigned imm3 = (inst & 0x0FFF);
 
-  mvSpecialReg[SR_PC] += 2;
+  // extract fields
+  unsigned regDst  = (inst & 0x0F00) >> 8; // destination register index
+  unsigned regSrc  = (inst & 0x00F0) >> 4; // source register index
+  unsigned opcode  = (inst & 0x000F);      // arithmetic opcode
+  unsigned imm8    = (inst & 0x00FF);      // 8-bit immediate
+  unsigned imm12   = (inst & 0x0FFF);      // 12-bit immediate
+
   switch(inst & 0xF000) {
   case 0x0000: // 0NNN - call machine language routine
-    if(inst == 0x00E0) {
+    switch(inst) {
-      // clear display
+    case 0x00E0: // clear display
       for(auto &scanline : *mrDisplay.mpFramebuffer) {
         scanline.reset();
       }
-    } else if(inst == 0x00EE) {
+      break;
-      // return from subroutine
+    case 0x00EE: // return from subroutine
       mvSpecialReg[SR_PC] = mCallStack.top();
       mCallStack.pop();
-    } else {
+      break;
+    default:
       throw std::invalid_argument("not implemented");
+      break;
     }
     break;
   case 0x1000: // 1NNN - unconditional jump
-    mvSpecialReg[SR_PC] = imm3;
+    mvSpecialReg[SR_PC] = imm12;
     break;
   case 0x2000: // 2NNN - call subroutine
     mCallStack.push(pc);
-    mvSpecialReg[SR_PC] = imm3;
+    mvSpecialReg[SR_PC] = imm12;
     break;
   case 0x3000: // 3XNN - skip if equal immediate
-    executeArithmetic(Opcode::JEQ, reg1, imm2);
+    executeArithmetic(Opcode::JEQ, regDst, imm8);
     break;
   case 0x4000: // 4XNN - skip if nonequal immediate
-    executeArithmetic(Opcode::JNEQ, reg1, imm2);
+    executeArithmetic(Opcode::JNEQ, regDst, imm8);
     break;
   case 0x5000: // 5XY0 - skip if equal
-    executeArithmetic(Opcode::JEQ, reg1, mvReg[reg2]);
+    executeArithmetic(Opcode::JEQ, regDst, mvReg[regSrc]);
     break;
   case 0x6000: // 6XNN - load immediate
-    executeArithmetic(Opcode::SET, reg1, imm2);
+    executeArithmetic(Opcode::SET, regDst, imm8);
     break;
   case 0x7000: // 7XNN - increment
-    executeArithmetic(Opcode::ADD, reg1, imm2);
+    executeArithmetic(Opcode::ADD, regDst, imm8);
     break;
   case 0x8000: // 8XNN - general arithmetic
-    executeArithmetic(opcodeMap[imm1], reg1, mvReg[reg2]); 
+    executeArithmetic(opcodeMap[opcode], regDst, mvReg[regSrc]); 
     break;
   case 0x9000: // 9XY0 - skip if nonequal
-    executeArithmetic(Opcode::JNEQ, reg1, mvReg[reg2]);
+    executeArithmetic(Opcode::JNEQ, regDst, mvReg[regSrc]);
     break;
   case 0xA000: // ANNN - load I
-    mvSpecialReg[SR_I] = imm3;
+    mvSpecialReg[SR_I] = imm12;
     break;
   case 0xB000: // BNNN - jump indirect
-    mvSpecialReg[SR_I] = mvReg[R_V0] + imm3;
+    mvSpecialReg[SR_I] = mvReg[R_V0] + imm12;
     break;
   case 0xC000: // CXNN - load random
-    executeArithmetic(Opcode::RAND, reg1, imm2);
+    executeArithmetic(Opcode::RAND, regDst, imm8);
     break;
   case 0xD000: // DXYN - draw
     break;
@@ -91,10 +96,13 @@ void Interpreter::tick() {
     break;
   }
 
+  // increment PC
+  mvSpecialReg[SR_PC] += 2;
+
+  // decrement timers
   if(mvSpecialReg[SR_T1] > 0) {
     mvSpecialReg[SR_T1] -= 1;
   }
-
   if(mvSpecialReg[SR_T2] > 0) {
     mvSpecialReg[SR_T2] -= 1;
     if(mvSpecialReg[SR_T2] == 0) {
@@ -103,15 +111,15 @@ void Interpreter::tick() {
   }
 }
 
-void Interpreter::loadProgram(uint16_t where, char const* data, size_t count) {
+void Interpreter::loadProgram(size_t where, char const* data, size_t count) {
   if(where + count > scMemorySize) {
     throw std::out_of_range("program exceeds memory bounds or capacity");
   }
   memcpy(mvMemory.data(), data, count);
 }
 
-void Interpreter::executeArithmetic(Opcode opcode, int iReg, uint8_t operand) {
+void Interpreter::executeArithmetic(Opcode opcode, int iReg, reg_t operand) {
-  uint8_t tmp;
+  reg_t tmp;
   switch(opcode) {
   case Opcode::SET:  mvReg[iReg]  = operand; break;
   case Opcode::AND:  mvReg[iReg] &= operand; break;

Interpreter.hpp

@@ -9,11 +9,14 @@
 namespace chocochip8 {
 
 class Interpreter {
+private:
+  using reg_t = uint8_t;
+  using sreg_t = unsigned;
+
 public:
-  constexpr static uint16_t scResetVector = 0x0200;
+  constexpr static sreg_t scResetVector = 0x0200;
   constexpr static size_t scMemorySize = 4096;
 
-private:
   enum {
     R_V0, R_V1, R_V2, R_V3, R_V4, R_V5, R_V6, R_V7,
     R_V8, R_V9, R_VA, R_VB, R_VC, R_VD, R_VE, R_VF,
@@ -32,20 +35,20 @@ private:
 public:
   Interpreter(unsigned ticksPerSecond, Display &display, Buzzer &buzzer, Keypad &keypad);
   void tick();
-  void loadProgram(uint16_t where, char const* data, size_t count);
+  void loadProgram(size_t where, char const* data, size_t count);
 
 private:
-  void executeArithmetic(Opcode opcode, int iReg, uint8_t operand);
+  void executeArithmetic(Opcode opcode, int iReg, reg_t operand);
 
 private:
   std::vector<uint8_t> mvMemory;
-  std::stack<uint16_t> mCallStack;
+  std::stack<sreg_t> mCallStack;
   Display &mrDisplay;
   Buzzer &mrBuzzer;
   Keypad &mrKeypad;
   const unsigned mcTicksPerSecond;
-  unsigned mvSpecialReg[SR_COUNT];
+  sreg_t mvSpecialReg[SR_COUNT];
-  uint8_t mvReg[R_COUNT];
+  reg_t mvReg[R_COUNT];
 }; // class Interpreter
 
 }; // namespace chocohip8