fixed arithmetic and logic (8XXX) instructions
interpreter now passes Timendus' flags test
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@@ -212,27 +212,30 @@ void Interpreter::executeArithmetic(Opcode opcode, int iReg, reg_t operand) {
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case Opcode::XOR: mvReg[iReg] ^= operand; break;
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case Opcode::RAND: mvReg[iReg] = rand() & operand; break;
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case Opcode::LSH:
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mvReg[R_VF] = (mvReg[iReg] & 0x80) ? 1 : 0;
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mvReg[iReg] <<= 1;
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mvReg[iReg] = operand << 1;
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// VF = shifted out bit
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mvReg[R_VF] = (operand & 0x80) ? 1 : 0;
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break;
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case Opcode::RSH:
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mvReg[R_VF] = (mvReg[iReg] & 0x01) ? 1 : 0;
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mvReg[iReg] >>= 1;
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mvReg[iReg] = operand >> 1;
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// VF = shifted out bit
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mvReg[R_VF] = (operand & 0x01) ? 1 : 0;
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break;
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case Opcode::ADD:
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tmp = mvReg[iReg] + operand;
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mvReg[R_VF] = (tmp < mvReg[iReg]) ? 1 : 0;
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mvReg[iReg] = tmp;
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mvReg[iReg] = mvReg[iReg] + operand;
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// VF = 1 if carry occurs, VF = 0 if no carry
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mvReg[R_VF] = (mvReg[iReg] < operand) ? 1 : 0;
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break;
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case Opcode::SUB:
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tmp = mvReg[iReg] - operand;
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mvReg[R_VF] = (tmp > mvReg[iReg]) ? 1 : 0;
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mvReg[iReg] = tmp;
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tmp = mvReg[iReg];
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mvReg[iReg] = mvReg[iReg] - operand;
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// VF = 0 if borrow occurs, VF = 1 if no borrow
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mvReg[R_VF] = (mvReg[iReg] > tmp) ? 0 : 1;
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break;
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case Opcode::SUB2:
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tmp = operand - mvReg[iReg];
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mvReg[R_VF] = (tmp > operand) ? 1 : 0;
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mvReg[iReg] = tmp;
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mvReg[iReg] = operand - mvReg[iReg];
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// VF = 0 if borrow occurs, VF = 1 if no borrow
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mvReg[R_VF] = (mvReg[iReg] > operand) ? 0 : 1;
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break;
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case Opcode::JEQ:
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if(mvReg[iReg] == operand) {
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