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rtl/common/multiplexer.sv Normal file
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module multiplexer #(
parameter WIDTH = 32,
parameter CHANNELS = 2
) (
input logic [$clog2(CHANNELS)-1:0] sel,
input logic [(CHANNELS*WIDTH)-1:0] in_bus,
output logic [WIDTH-1:0] out
);
genvar ig;
logic [WIDTH-1:0] in_array [CHANNELS];
assign out = in_array[sel];
for(ig = 0; ig < CHANNELS; ig = ig + 1) begin
assign in_array[(CHANNELS - 1) - ig] = in_bus[ig * WIDTH +: WIDTH];
end
endmodule