first commit

rtl/RAM.v

@@ -0,0 +1,33 @@
+module RAM #(
+    parameter WIDTH = 8,
+    parameter SIZE  = 128,
+    parameter INIT_FILENAME = ""
+) (
+    input                    clock,
+    input                    reset,
+    input                    clock_en,
+    input                    write_en,
+    input [$clog2(SIZE)-1:0] addr,
+    input        [WIDTH-1:0] din,
+    output reg   [WIDTH-1:0] dout
+);
+
+    reg [WIDTH-1:0] ram[SIZE-1:0], dout;
+    
+    integer i;
+    initial begin
+        if(INIT_FILENAME == "")
+            for(i = 0; i < SIZE; i=i+1) ram[i] = 0;
+        else
+            $readmemb(INIT_FILENAME, ram);
+    end
+    
+    always @(posedge clock) begin
+        if(clock_en) begin
+            dout <= reset ? 0 : ram[addr];
+            if(write_en)
+                ram[addr] <= din;
+        end
+    end
+
+endmodule